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https://hdl.handle.net/123456789/1340| Τύπος: | Άρθρο σε επιστημονικό περιοδικό |
| Τίτλος: | Accessing register spaces in FPGAs within the ATLAS DAQ Scheme via the SCA eXtension |
| Συγγραφέας: | [EL] Μπακάλης, Χρήστος[EN] Bacalis, Christos [EL] Αλεξόπουλος, Θεόδωρος[EN] Alexopoulos, Theodoros [EN] Grayzman, Israel [EN] Lee, L. Jr. [EN] Levinson, Lorne [EL] Περγαντή, Μαρία[EN] Perganti, Maria [EL] Πολυχρονάκος, Βενέτιος[EN] Polychronakos, Venetios |
| Ημερομηνία: | 30/06/2021 |
| Περίληψη: | The foreseen upgrades of the Large Hadron Collider (LHC) are expected to increase the required throughput of the front-end and back-end electronics that support the readout of the LHC detectors. Therefore, the complexity of the electronics systems will be increased as well. An example of this is the electronics system of the New Small Wheel (NSW) upgrade of the ATLAS detector, which will be comprised of a number of Field-Programmable Gate Arrays (FPGAs), and Application-Specific Integrated Circuits (ASICs). These ASICs will be configured and monitored by the Slow Control Adapter (SCA), another ASIC designed for this purpose. The Slow Control Adapter eXtension (SCAX) on the other hand, is an FPGA module designed to support FPGA systems that are part of the ATLAS electronics scheme by reading and writing their configuration parameters and status indicators. SCAX emulates both the I2C interface of the SCA used to access the NSW ASICs, as well as the communication protocol implemented between the SCA and the back-end infrastructure. It thereby enables using the same OPC-UA server and back-end software suite that support the ASICs, to also interface with the FPGAs that are part of the same system. This work describes the context of the SCAX’s implementation, alongside architectural considerations of the module, features, and techniques to validate its hardware implementation across a variety of FPGA devices. |
| Γλώσσα: | Αγγλικά |
| Σελίδες: | 12 |
| DOI: | 10.1088/1748-0221/16/11/A11001 |
| ISSN: | 1748-0221 |
| Θεματική κατηγορία: | [EL] Σωματιδιακή φυσική και Φυσική πεδίων[EN] Particles and Fields Physics |
| Λέξεις-κλειδιά: | atlas experiment; Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms, databases); Data acquisition concepts; Digital electronic circuits |
| Κάτοχος πνευματικών δικαιωμάτων: | © 2021 IOP Publishing Ltd and Sissa Medialab |
| Ηλεκτρονική διεύθυνση του τεκμηρίου στον εκδότη: | https://iopscience.iop.org/article/10.1088/1748-0221/16/06/P06041 |
| Ηλεκτρονική διεύθυνση περιοδικού: | https://iopscience.iop.org/journal/1748-0221 |
| Τίτλος πηγής δημοσίευσης: | Journal of Instrumentation (JINST) |
| Τόμος: | 16 |
| Σελίδες τεκμηρίου (στην πηγή): | Article no P06041 |
| Σημειώσεις: | This article is corrected by 2021 JINST 16 A11001 (https://iopscience.iop.org/article/10.1088/1748-0221/16/11/A11001) This research is co-financed by Greece and the European Union (European Social Fund-ESF) through the Operational Programme “Human Resources Development, Education and Lifelong Learning 2014–2020” in the context of the project “Develop of an advanced system for evaluating of the data readout electronics system in Micromegas detectors for the upgrade of the ATLAS experiment” (MIS 5049537). |
| Εμφανίζεται στις συλλογές: | Ερευνητικές ομάδες |
Αρχεία σε αυτό το τεκμήριο:
| Αρχείο | Περιγραφή | Σελίδες | Μέγεθος | Μορφότυπος | Έκδοση | Άδεια | |
|---|---|---|---|---|---|---|---|
| 3)final_version_with_addendum_toBePublished.pdf | 1.63 MB | Adobe PDF | Του συγγραφέα (post-refereeing) |  | Δείτε/ανοίξτε | ||
| 5)teliko_paper_2021_J._Inst._16_A11001.pdf | 443.41 kB | Adobe PDF | Δημοσιευμένη/του Εκδότη | | Δείτε/ανοίξτε |